数字逻辑3_2.ppt

PRINCIPLES AND PRACTICES 1 Other CMOS Input and Output Structures P129 Gates ( 传输门) EN = 0 , EN_L = 1 , disconnected 当 EN = 1 , EN_L = 0 , low-impedance connection Two-way device Propagation delay is very short As a unit circuit in CMOS device EN EN_L ABTG PRINCIPLES AND PRACTICES 2 -Trigger inputs ( 施密特触发器输入结构) A special input circuit that use feedback internally to produce the hysteresis Schmitt-trigger inputs have better noise immunity than ordinary gate inputs 常用于集成电路内部输入端,可对输入波形进行整形 Hysteresis 滞后现象 PRINCIPLES AND PRACTICES 3 The results of two inverter Ordinar y inverter Schmi tt- trigger invert er PRINCIPLES AND PRACTICES 4 Wave transformation (波形变换) Pulse amplitude discrimination (脉冲幅度识别) PRINCIPLES AND PRACTICES 5 -state outputs ( 三态输出结构) An output of a gate: logic 0, logic 1 and Hi-Z ( Hi-Z : high-impedance ) PRINCIPLES AND PRACTICES 6 symbol ④: application —— three-state bus ( 三态总线)⑤: application —— two-way transmission ( 双向数据传输) EN Gate PRINCIPLES AND PRACTICES 7 4. open-drain outputs( 漏极开路输出结构) Output: LOW and OPEN HIGH: external pull-up resistor intention : Driving devices that require large amounts of current Level transformation (电平转换) Performing wired logic (连线逻辑) vcc PRINCIPLES AND PRACTICES 8 The outputs of ordinary gates can not be tied together Wired-AND ( 线与) function on three open-drain NAND-gate outputs Pull high Pull low PRINCIPLES AND PRACTICES 9 应用举例: 51单片机 P0 口 P0 口 PRINCIPLES AND PRACTICES 10 CMOS/TTL Interfacing P169 logic family ( transistor-transistor logic) Part number – mmFAMnn: mm: 74/54 , commercial/military FAM : alphabetic family mnemonic S:Schottky( 肖特基) LS:Low-power Schottky AS:Advanced Schottky ALS:Low-power Advanced Schottky F:Fast nn : numeric function designator