Section4 High Speed Sanmping ADCs.pdf

SECTION 4
HIGH SPEED
SAMPLING ADCs
ADC Dynamic Considerations
Selecting the Drive Amplifier Based on
ADC Dynamic Performance
Driving Flash Converters
Driving the AD9050 Single-Supply ADC
Driving ADCs with Switched Capacitor Inputs
Gain Setting and Level Shifting
External Reference Voltage Generation
ADC Input Protection and Clamping
Applications for Clamping Amplifiers
Noise Considerations in High Speed Sampling
ADC Applications
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SECTION 4
HIGH SPEED SAMPLING ADCS
Walt Kester
Modern high speed sampling ADCs are designed to give low distortion and wide
dynamic range in signal processing systems. Realization of specified performance
levels depends upon a number of factors external to the ADC itself, including proper
design of any necessary support circuitry. The analog input drive circuitry is
especially critical, because it can degrade the inherent ADC dynamic performance if
not designed properly.
Because of various process and design-related constraints, it is generally not
possible to make the input of a high speed sampling ADC totally well-behaved, .,
high impedance, low capacitance, ground-referenced, free from glitches, impervious
to overdrive, etc. Therefore, the ADC drive amplifier must provide excellent ac
performance while driving what may be a somewhat hostile load (depending upon
the particular ADC selected).
The trend toward single-supply high speed designs adds additional constraints. The
input voltage range of high speed single-supply ADCs may not be ground referenced
(for valid design reasons), therefore level shifting with single-supply op amps (which
may have mon-mode input and output ranges) is usually required,
unless the application allows the signal to be ac coupled.
Although there is no standard high speed ADC input structure, this section
addresses the mon ones and provides guidelines for properly designing the
appropriate input drive circuitry.
Some sampling ADCs also require external reference vol