Resistive switching characteristics of TiO2 films with embedded Co.doc

A Low-Voltage High-Speed CMOS Inverter-Based Digital Differential Transmitter with Impedance Matching Control and Mismatch Calibration
Jun-Hyun Bae, Sang-Hune Park, Jae-Yoon Sim, and Hong-June Park
Abstract—A digital differential transmitter based on CMOS inverter worked up to Gbps at the supply voltage of 1 V with a mm CMOS process. By calibrating the output impedance of the transmitter, the impedance matching between the transmitter output and the transmission line is achieved. The PVT variations of pre-driver pensated by the calibration of the rising-edge delay and falling-edge delay of the pre-driver outputs. The chip fabricated with a mm CMOS process, which uses the standard supply voltage of V, gives the highest data rate of 4 Gbps at the supply voltage of V. The proposed calibration schemes improve the eye opening with the voltage margin by 200% and the timing margin by 30%, at Gbps and 1 V.
Index Terms—Transmitter, digital, differential, termination, inverter-based, low voltage
I. Introduction
The differential signaling is widely used for high-speed interface because of its superior immunity to environmental noise and the low EMI. The digital circuits shrink rapidly with the advent of recent semiconductor processes. Also the supply voltage is reduced to about 1 V for the state-of-the-art semiconductor processes. Efforts are driven to deve