基于i2c总线接口的低功耗10bit adc的设计based on the i2c bus interface of low power design of 10 bit adc.docx

Abstract
ADC as the connecting point between the analog world and di西tal world,it plays an indispensable role in the field of signal processing,now it is widely used in the systems on chips(SOC).Along with the advance of information technology,especially
rapid developments of the portable electronic equipments,automotive electronics and
the signal acquisition devices with battery power,SO the demands for small volume,
low power e increasingly stronger.
Compared to other kinds ofADCs,SAR ADC has the advantages of simple circuit structure,low cost and low power order to let the electronic equipments with low voltage power plete A/D conversion better,SAR ADC
is the best choice undoubtedly.
In this paper,a 1 0-bit SAR ADC based on 12C bus interface is been proposed,this chip can work on the standard mode and quick mode of the 12C bus,pletes the analog-·to--digital conversion and data output according to the instruction of traditional digital coding parallel output pins are replaced with the
two 12C bus interfaces,this reduces the number of the chip pins,and make the
occupied area on chip e decreased paper emphatically analyzes the circuit designs of DAC the DAC module,a 1 2-bit DAC designed wim three-stage different scaling types bination is proposed,using high precision characteristic of capacitance and monotone feature of resistance string partial pressure improve the accuracy of D/A method
of bination reduces the number of unit devices in work
significantly,and reduces the DAC’S power consumption and layout area effectively. For parator module,a pre-amplifier and latch parator with offset
zero suppression is proposed,this cascading way not only increas es the gain of parator and enhances the resolving power of parator,but also reduces the transmission delay of parator. By the output disturbance elimination technology,eliminates the interference of offset this pape