cmos电感电容压控振荡器设计-微电子学与固体电子学专业毕业论文.docx

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AB STRACT
ABSTRACT:With the rapid development of the munication technology, the market arises great demond for radio frequency(RF)integrated circuits(ICs). Because of the mature technology,low cost and low power consumption,CMOS RFIC es the development trend of RF Voltage—Controlled Oscillator(vco) holds a very important position in RFICs,which is the main part of PLL,clock recovery circuit and frequency is the bottleneck in CMOS RF ICs because of the random fluctuation shift and phase noise at output low quanlity factor(Q)of spiral inductor on silicon(SIOS)is the key point to affect VCO’S
performance.
In this thesis,the theories and practice of LC VCO are studied;the theory of CMOS negative resistance VCO used in Phase—Locked Loop is thesis introduces the method of”One—port Oscillator”pares the performances and characteristics of different kinds of”negative—Gm” a LC
VCO has been essfully designed.
Since the fully integrated inductors with high quality factor are the key of a LC VCO design in CMOS technology,the structures and realizations of on—chip spiral inductor in CMOS technology,the methods of inductor modeling,and the physical reasons which affects the Q-factor are we introduce the realization in CMOS technology of varactor,which is the other ponent in LC the simulations have been done in Cadence.
We have studied two analysis methods of phase noise:linear time invariant and nonlinear time phase noise theory of oscillator is studied in detml, including Leeson Quasi experimental Model and Impulse Sensitivity Function(ISF). The characteristic of different area’s phase noise Call be essfully explained by these two methods are given for lower phase methods are applied in an actual VCO and are proved to be effective.
Circuit simulation,layout design,extraction of parameters and post layout simulation