c波段低相位噪声跳频源的研制-电路与系统专业毕业论文.docx

ABSTRA(X
ABSTRACT
Today,as the electronic technology is developing fantasficly fast,the request for higher performance of synthesizers is put forward,especially the low phase noise the薹'LL is the main force of modern synthesizer,do a forwad research in technology of low phase noise design is very this reason,the paper is mainly focus on the theory and technology of low phase noise PLL design.
This article introduces a scheme which makes C-band lOW phase noise hopping frequency e true,with PLL and innovative ideas of low phase noise design about PLL is presented in this paper.
At first,the developing history and actuality of the frequency synthesis technology is reviewed。and,Pn frequency synthesis basic technology is ,the phase noise and spurs of caculating modd is deduced and frequency synthesizer models
in c《}IRtnon use is aslo particularly on the phase noise caculating model
the close-to—carrier phase noise math expression of dual-loop PU synthesizer is
,the keys of engineering-oriented realization of such modules as loop filters,dual—VCO and froquency detectors ale questions which must be
paid much attention in the system design,and a innovative PFD lock detector circuit is
presented in this paper.
At last,a C-band low phase noise and low spurs PLL designs ale to be presented by me to verify the theroies of low phase noise and low spurs in a word,this article provide some meaningfull instruction for low phase noise and low noise hopping
萤嘲疆鼹cy Pn design。
Key words:phase noise,Supr Redu砸on,hopping frequency synthesizer
PFD lock detector circuit,C-band
n
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签名: 豳靴移5影嚣
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