英文原文12-BitA/plete12-bitA/essiveapproximationanalog-to--BitA-to-mandedtoinitiateaconversion(asdescribedlater),essiveapproximationregister(SAR),,timedbytheclock,willsequencethroughtheconversioncycleandreturnanend-of-,bringtheoutputstatusflaglow,,theinternal12-bitcurrentoutputDACissequencedbytheSARfromthemostsignificantbit(MSB)toleastsignificantbit(LSB)uratelybalancestheinputsignalcurrentthroughthe5kΩ(or10kΩin)-urrentsumtobegreaterorlessthantheinputcurrent;ifthesumisless,thebitislefton;ifmore,,theSARcontainsa12-uratelyrepresentstheinputsignaltowithin1/()andbipolaroffsetresistorrentmustbesuppliedoverthefulltemperaturerange,-filmapplicationresistorsaretrimmedtomatchthefull-–AD574AInterfaceTheoutputimpedanceofanopamphasanopen-loopvaluewhich,inaclosedloop,,monitortheAD574’-and-holdamplifier,-AND-urate12-bitconversionsoffrequenciesgreaterthanafewHzrequirestheuseofasample-and
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