120-0082-000_EM250_Datasheet.pdf

EM250 Single-Chip ZigBee/ Solution ? Integrated , IEEE trans- ceiver: ? Robust RX filtering allows co-existence with IEEE and Bluetooth devices ?- 99dBm RX sensitivity (1% PER, 20byte packet) ?+ 3dBm nominal output power ? Increased radio performance mode (boost mode) gives - 100dBm sensitivity and + 5dBm transmit power ? Integrated VCO and loop filter ? Integrated IEEE PHY and lower MAC with DMA ? Integrated hardware support for Packet Trace Interface for InSight Development Environment ? Provides integrated RC oscillator for low power operation ? Supports optional crystal oscillator for higher accuracy needs ? 16-bit XAP2b microprocessor ? Integrated memory: ? 128kB of Flash ? 5kB of SRAM ? Configurable memory protection scheme ? Two sleep modes: ? Processor idle ? Deep sleep— μ A ( μA with op- tional oscillator enabled) ? Seventeen GPIO pins with alternate functions ? Two Serial Controllers with DMA ? SC1: I 2C master, SPI master + UART ? SC2: I 2C master, SPI master/slave ? Two 16-bit general-purpose timers; one 16- bit sleep timer ? Watchdog timer and power-on-reset circuitry ? Non-intrusive debug interface (SIF) ? Integrated AES encryption accelerator ? Integrated ADC module first-order, sigma- delta converter with 12-bit resolution ? Integrated voltage regulator PacketTrace ADC RF_P,N Program Flash 128kB Data SRAM 5kB SIF_MISO HF OSC LF OSC ADC SIF Internal RC-OSC GPIO multiplexor swtich Chip manager Regulator Bias Interrupt controller RF_TX_ALT_P,N OSCA OSCB OSC32A OSC32B GPIO[16:0] SIF_MOSI SIF_CLK nSIF_LOAD Encryption accelerator IF Always powered XAP2b CPU VREG_OUT Watchdog PA select LNA PA PA DAC MAC + Baseband TX_ACTIVE Sleep timer BIAS_R POR nRESET General purpose timers GPIO registers UART/ SPI/I2C SYNTH Ember Corporation 47 Farnsworth Street Boston, MA 02210 +1 (617) 951-0200 ober 17, 2010 120-0082-000S EM250 General Desc