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Efficient Asynchronous Protocol Converters for Two-Phase Delay…:双相延迟的高效异步协议转换器….ppt


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1 Outline Outline ?? Motivation and Contribution Motivation and Contribution ?? System-on-Chip: Concepts and Trends System-on-Chip: Concepts and Trends ?? Asynchronous Signaling Styles Asynchronous Signaling Styles ?? Target Asynchronous SOC Architecture Target Asynchronous SOC Architecture ?? Contribution Contribution ?? Proposed System Architecture Proposed System Architecture ?? Experimental Results Experimental Results ?? Extensions: Other Signaling Styles Extensions: Other Signaling Styles ?? Conclusions and Future Work Conclusions and Future Work 2 System-on-Chip (SOC): Concept and Trends System-on-Chip (SOC): Concept and Trends ?? Microelectronic trends enabling SOC design Microelectronic trends enabling SOC design ?? Increasing integration density + chip size Increasing integration density + chip size ?? Formerly discrete functions (memory, I/O) now integrated Formerly discrete functions (memory, I/O) now integrated ?? Popularity of Popularity of ““ multi-core multi-core ”” designs designs ?? Heterogeneous SOC: Heterogeneous SOC: ?? plex chip with broad functionality plex chip with broad functionality ?? Many putation nodes Many putation nodes ?? Multiple cores, memories, accelerators, multimedia processing, etc. Multiple cores, memories, accelerators, multimedia processing, etc. ?? Often includes multiple timing domains Often includes multiple timing domains ?? work-style interconnect work-style interconnect fabric ?? Challenges in Heterogeneous SOC design: Challenges in Heterogeneous SOC design: ?? Wire costs not scaling down with device size Wire costs not scaling down with device size ?? Increasing proportion of power and delay in interconnect Increasing proportion of power and delay in interconnect ?? Robust and high-performance interconnect design: Robust and high-performance interconnect design: ?? High latencies between remote nodes High latencies between remote nodes ?? Mixed timing, timing variability/uncertainty Mixed timing, timing var

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  • 时间2016-04-17