论文(设计)题目 基于FPGA的HDB3码的编码器 与译码器设计(软件设计) 子课题题目 姓 名 周艳 学 号 7 所属院系 自动控制与机械工程学院 专业年级 2010级通信技术1班 指导教师 任杰 2013年 5月 摘 要 HDB3码是基带传输码型之一,因为它具有无直流分量、低频分量少、连0数不超过3个这些特点,所以有利于信号的恢复和检验,所以HDB3码被广泛应用到井下电缆遥传系统以及高速长距离书记通信中等。FPGA具有成本低、可靠性高、开发周期短、可重复编程等特点。利用EDA技术,可对其实现硬件设计软件化,加速了数字系统设计的效率,降低了设计成本。本文先对HDB3码,FPGA器件和EDA技术的发展背景进行简述。接着阐述EDA技术中常用的VHDL语言的发展与优点,并以VHDL为核心,简要说明硬件电路的设计的方法步骤。然后介绍HDB3码的编译码原理以及其特点。最后,对HDB3码的编译原理进行重点分析,并且以VHDL语言为主,分别对编码器部分和译码器部分的具体实现方法进行说明,给出具体设计的思考方案和程序流程图,并对设计方案进行软件仿真,同时给出仿真结果并对其进行分析,证明设计方案的正确性。 关键词:HDB3码;FPGA;EDA;VHDL;编译码 Abstract HDB3 code is one of codes used in the transmission system. It has no DC components and a few of LF components. Moreover, it has continuous zeros no more than three. The features of HDB3 code help the signal to be rebuilt and be checked for error easily, so HDB3 code is the commonly used code in the transmission system. Low cost, dependability, short design cycle and repeated program ability are the features of FPGA. You can design hardware of digital circuits by using software as a result of using FPGA with EDA. It will construct the digital system quickly system quickly and reduce the cost of design. This paper first introduces the development and background of and EDA, and then expands VHDL. which is commonly used as design-entry language for summary of digital circuits’ design by using VHDL is provided. Moreover, the principle and decoder is designed by using VHDL. Finally, the plan of design, the flow of software design and the simulated waveform of HDB3 encoder and decoder is presented, showing correctness of the design. Keywords: HDB3 code; FPGA ; EDA ; VHDL; Encoder and Decoder 目录 第一章 概述 1 HDB3码