网络首发时间:2022-06-20 10:33:26 网络首发地址:. 第44卷 ) is proposed to apply for the cryptographic array architecture, which can be compatible with stream cipher algorithms on different Galois fields. Moreover, parallel extraction and pipeline processing strategies are executed to exploit the FSR-level parallelism of stream cipher. The experimental results show that the performance improvement of the experimental platform brought by RFAU is reached 23%~186% for the stream ciphers on the Galois Field (GF)(2), compared with the other reconfigurable processors. For the stream ciphers on the GF (2u) field, the throughput rate is improved to 66%~79%, and the area efficiency is enhanced to 64%~91%. It proves that after integrating RFAU, the processing performance of the stream cipher algorithm of the Coarse-Grain Reconfigurable Array (CGRA) platform is effectively improved by means of parallel computing. Key words: Coarse-Grain Reconfigurable Array (CGRA); Stream Cipher Algorithm; Feedback Shift Register (FSR); Pipeline