英文原文 12-Bit A/D Converter CIRCUIT OPERATION The AD574A plete 12-bit A/D converter which requires no ponents to provide plete essive approximation analog-to-digital conversion function. A block diagram of the AD574A is shown in Figure 1 . Figure 1. Block Diagram of AD574A 12-Bit A-to-D Converter When the control section manded to initiate a conversion (as described later), it enables the clock and resets the essiveapproximation register (SAR) to all zeros. Once a conversion cycle has begun, it cannot be stopped or restarted and data isnot available from the output buffers. The SAR, timed by the clock, will sequence through the conversion cycle and return an end-of-convert flag to the control section. The control section will then disable the clock, bring the output status flag low, and enable control functions to allow data read functions by mand. During the conversion cycle, the internal 12-bit current output DAC is sequenced by the SAR from the most significant bit (MSB) to least significant bit (LSB) to provide an output current which accurately balances the input signal current through the 5kΩ(or10k Ω) input resistor. parator determines whether the addition of each essively-weighted bit current causes the DAC current sum tobe greater or less than the input current; if the sum is less, the bit is left on; if more, the bit is turned off. After testing all the bits, the SAR contains a 12-bit binary code which accurately represents the input signal to within 1/2 LSB. The pensated buried Zener reference provides the primary voltage reference to the DAC and guarantees excellent stability with both time and temperature. The reference is trimmed volts %; it can supply up mA to an external load in addition to the requirements of the reference input resistor ( mA) and bipolar offset resistor (1 mA) when the AD574A is powered from 15V supplies. If the AD574A is used with 12V supplies, or if external current must be supplied over the full temperature rang
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