ic datasheet pdf-ads7866_ads7867_ads7868,pdf (1.2-v 12_10_8-bit 200-ksps_100-ksps micro-power miniat.pdf

BurrĆBrown Products
from Texas Instruments ADS7866
ADS7867
ADS7868
SLAS465–JUNE 2005
-V, 12-/10-/8-BIT, 200-KSPS/100-KSPS, MICRO-POWER, MINIATURE
ANALOG-TO-DIGITAL CONVERTER WITH SERIAL INTERFACE
FEATURES The sampling, conversion, and activation of digital
• Single -V to -V Supply Operation output SDO are initiated on the falling edge of CS.
The serial clock SCLK is used for controlling the
•
High Throughput conversion rate and shifting data out of the converter.
≥
– 200/240/280KSPS for 12/10/8-Bit VDD V Furthermore, SCLK provides a mechanism to allow
≥ digital host processors to synchronize with the con-
– 100/120/140KSPS for 12/10/8-Bit VDD V
•± verter. These converters interface with
INL, 12-Bit NMC (ADS7866) micro-processors or DSPs through a high-speed SPI
•
71 dB SNR, –83 dB THD at fIN = 30 patible serial interface. There are no pipeline
(ADS7866) delays associated with the device.
• Synchronized Conversion with SCLK The minimum conversion time is determined by the
• patible Serial Interface frequency of the serial clock input, SCLK, while the
• No Pipeline Delays maximum frequency of SCLK is determined by the
minimum sampling time required to charge the input
•
Low Power capacitance to 12/10/8-bit accuracy for the
– mW Typ at 200 KSPS, VDD = V ADS7866/67/68, respectively. The maximum
– mW Typ at 200 KSPS, V = V throughput is determined by how often a conversion
DD is initiated when the minimum sampling time is met
– mW Typ at 100 KSPS, VDD = V and the maximum SCLK frequency is used. Each
• Auto Power-Down: 8 nA Typ, 300 nA Max device automatically powers down after each conver-
• sion, which allows each device to save power when
0 V to VDD Unipolar Input Range
• the throughput is reduced while using the maximum
6-Pin SOT-23 Package SCLK frequency.
APPLICATIONS The converter reference is taken internally from the
• Battery Powered Systems supply. Henc